1. Field of the Invention
The invention relates to integrated circuit memories and more particularly to memories having repair circuits.
An integrated circuit memory is in the form of a semi conductor wafer having microscopic electronic circuits arranged with respect to each other which may contain, by their electric states, digitized information. The evolution of the technique for manufacturing memories tends to an increase in the density of the circuits contained in the memories, as well as an increase in the size of the memories themselves. The reasons for this evolution are essentially related to the greater reliability of integrated circuits with respect to comparable organizations made with discrete elements. This desired technical evolution meets with a major difficulty: the possibility of effectively manufacturing the memory circuits contemplated. The increase in density of the circuits leads manufacturers to produce memories whose elementary pitch is of the order of a micrometer. Consequently, the photolithographic masks used for manufacturing the memories must be accurately made: they are expensive.
Furthermore, the technical evolution of circuits is such that the commerical interests of such circuits is limited in time. They are rapidly obsolete. For this reason manufacturers do not have sufficient time for improving the productivity of their machines. The yields of these manufacturing machines are always less than one. The manufacture, or rather sampling, of the memories is therefore followed by a phase for checking the quality of the manufactured memories: the defective pieces are rejected. The rejects are all the more numerous the larger the size of the memories to be manufactured, or the smaller their manufacturing pitch or else the more recent the design of the circuit. To overcome these disadvantages, manufacturers have thought of providing these memories with repair circuits. The purpose of the repair circuits is to substitute, in a memory, a circuit in good condition for a defective circuit. The purpose of the present invention is to increase the operating efficiency of the repair circuits as well as simplifying the bringing into operation of these repair circuits. The result will be an improvement in the manufacturing yield.
In memories, the information is contained in memory cells.
They are distributed in a matrix in a line and column arrangement. The memories also comprise decoders: at least one line decoder for selecting a cell line and possibly a column decoder for selecting a cell column. In the memories, the cells of the same cell line are connected to a common connection or possibly to the two same complementary connections called bit lines. These bit lines allow the electric states contained, or to be contained, in the memory cells to be transmitted.
These bit lines are each biased at one end by a supply circuit and each is connected at the other end to a bit line selection circuit. The bit line selection circuits of a cell line are themselves controlled by outputs of the line decoder which corresponds to the cell line in question. The repair circuits concerned by the present invention are circuits interconnected between selection circuits and the corresponding outputs of the decoder.
The purpose of the repair circuits is to disable the selection circuits of a cell line and thus to place the bit lines of this cell line out of operation. When such disabling has taken place, the repair circuit establishes a connection between the coder and a repair connection. An additional cell line is connected to this repair connection. This additional line is redundant with respect to the nominal capacity of the memory. The repair circuits must then be able to assume two separate states. In a first state, they do not interfere with the normal operation of the decoder and of the cell lines. In repair operation they transport the selection orders assigned to a cell line in poor condition to a redundant cell line. In order to be able to assume these two states, the repair circuits of the prior art comprise a bistable circuit connected in cascade with a fuse. Under normal operation, the fuse is not cut, the distable is in a first state. When it is desired to go over to a repair situation, the fuse is cut. Such cutting of the fuse is obtained by external means. The bistable then changes state.
2. Description of the Prior Art
In the state of the art means are known for melting the fuses. These means comprise essentially means for holding the semiconductor wafer opposite a laser. The ray of the laser is moved with respect to the wafer so that this ray is directed very precisely on a fuse to be melted. A laser ray pulse is set: the fuse melts. The repair circuit then changes state, and a connection is formed between the output or outputs of the decoder which correspond to the cell line in question and a repair connection connected to an additional cell line. At the same time the information concerning the change of state of the repair circuit is used for disabling the selection circuits of the cell lines thus placed out of operation.
This construction has two drawbacks. The main drawback resides in the manipulation of the laser. On the one hand acquisition of the laser is expensive which increases the price of the manufactured memories and, on the other hand, manipulation of this laser is delicate. In fact, it is necessary to place the laser with respect to the wafer such that it aims exactly at the position of the fuse to be melted. The time lost in learning handling of the laser, handling relative to each type of memory manufactured, must be deducted from the commercial lifespan of the memory in question. Furthermore, it is not always sufficient to replace a deficient cell line by a redundant cell line. In fact, if the deficient cell line is the location of an electric short circuit, for example between one of its bit lines and a supply circuit, the memory, which is functionally sound since it has been repaired, is even so rejected during verification tests for excessive electric consumption. This excessive electric consumption means that the circuit departs from the ranges of specifications guaranteed by the manufacturer. Under such conditions, all the advantages which it had been hoped to be found cannot be expected of the repair circuits.